The present invention is related to a semiconductor device having a non-volatile storage element capable of storing at least 4 values of information (namely, 2 bits of information) into a single memory cell, for example, an electrically reprogramable non-volatile semiconductor memory device such as a flash memory, and furthermore, is related to a technique effectively applicable to a data processing system such as a file memory system with using this non-volatile semiconductor memory device.
Conventionally, non-volatile semiconductor storage devices such as flash memories have been proposed. These storage devices are capable of storing information by injecting and/or extracting electrons with respect to floating gates. A flash memory owns a memory cell transistor having a floating gate, a control gate, a source, and a drain. In this memory cell transistor, when electrons are injected into the floating gate, a threshold voltage would be increased, whereas when electrons are extracted from the floating gate, the threshold voltage would be decreased. The memory cell transistor may store therein information in response to the higher/lower threshold voltages with respect to a word line voltage (namely, voltage applied to control gate) used to read out data. Although not having restriction intentions, the lower threshold voltage condition of the memory cell transistor will be referred to as an "erasing state", and the higher threshold voltage condition thereof will be referred to as a "writing state" in this specification.
Among these flash memories, such a flash memory is available that information having more than 4 values can be stored in a single memory transistor. For example, such multi-level memories are described in Japanese Publication "NIKKEI MICRODEVICE" issued in November, 1994, pages 48 to 49, and further Japanese laid-opened Patent Application No.9-297996/1997 opened in 1997.